MIG and COG Reversible Logic Gate based Fault Tolearnt Full Adder/Subtarctor

Authors : Poornima Pathak , Vipin kumar Gupta.

Volume/Issue : Volume 2 - 2017, Issue 5 - May

Google Scholar : https://goo.gl/ezuU4H

Scribd : https://goo.gl/PiME6p

Thomson Reuters ResearcherID : https://goo.gl/3bkzwv

The Reversible logic gate is evolving to be difficult for future computing innovations. It is progressing as the fundamental field of research that concern general uses in the domain such as CMOS design (reduced power). In this work, the recommended summary of complete adder/subtractor circuit using Reversible logic gates (Fault Tolerant). We recommended a complete adder/subtractor by employing COG (Controlled Operation Gate) and MIG (Modified Islam Gate) Reversible logic gate with the intelligence. One can easily deduce form the Results section that a setback can be reduced as much as 61% when utilizing COG and MIG Reversible logic gate compared to the complete adder/subtractor founded on the FDG (Feynman Double Gate).

Keywords : COG, MIG, Complete Adder, Set-back, Reversible Gate, Fredkin Gate, Feynman Double Gate.


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