Authors :
Bekmuratova AB; Bakytzhan A.B
Volume/Issue :
Volume 8 - 2023, Issue 2 - February
Google Scholar :
https://bit.ly/3IIfn9N
Scribd :
https://bit.ly/3lZ7TcB
DOI :
https://doi.org/10.5281/zenodo.7676755
Abstract :
Cryptographic systems based on nonpositional polynomial systems make it possible to create
an effective highly reliable cryptographic system that
ensures confidentiality, authenticity and integrity of
stored and transmitted information. The basis of nonpositional polynomial number systems are irreducible
polynomials over the field GF(2). The article discusses a
method for creating a database of irreducible polynomials
in a finite field GF(2) based on software logic integrated
circuits. The main idea of the algorithm for creating a
base of irreducible polynomials in a finite field GF(2) is to
study the nonlinearity of all polynomials in a finite field
GF(2) using the Ben-Or algorithm. The algorithm is
implemented in the Verilog HDL language. However,
multiplication on finite fields is often a time-consuming
task requiring hardware and software. To solve the
problem, an FPGA is used, which allows to implement
parallel multipliers that perform a full multiplication
operation in several cycles. Functional and temporal
modeling of the behavioral model algorithm was
performed using examples and the correctness of the
algorithm was confirmed. The scheme of the device at the
register transfer level (RTL) for FPGA is obtained.
Keywords :
Irreducible Polynomials, Cryptography, Programmable Logic Integrated Circuits, Ben-or Algorithm.
Cryptographic systems based on nonpositional polynomial systems make it possible to create
an effective highly reliable cryptographic system that
ensures confidentiality, authenticity and integrity of
stored and transmitted information. The basis of nonpositional polynomial number systems are irreducible
polynomials over the field GF(2). The article discusses a
method for creating a database of irreducible polynomials
in a finite field GF(2) based on software logic integrated
circuits. The main idea of the algorithm for creating a
base of irreducible polynomials in a finite field GF(2) is to
study the nonlinearity of all polynomials in a finite field
GF(2) using the Ben-Or algorithm. The algorithm is
implemented in the Verilog HDL language. However,
multiplication on finite fields is often a time-consuming
task requiring hardware and software. To solve the
problem, an FPGA is used, which allows to implement
parallel multipliers that perform a full multiplication
operation in several cycles. Functional and temporal
modeling of the behavioral model algorithm was
performed using examples and the correctness of the
algorithm was confirmed. The scheme of the device at the
register transfer level (RTL) for FPGA is obtained.
Keywords :
Irreducible Polynomials, Cryptography, Programmable Logic Integrated Circuits, Ben-or Algorithm.
