Authors :
Almukhtar Ahmed
Volume/Issue :
Volume 5 - 2020, Issue 3 - March
Google Scholar :
https://goo.gl/DF9R4u
Scribd :
https://bit.ly/2y34cK5
Abstract :
The level of circuit performance which can
be reached with in certain design time mainly depends
on the efficiency of the design methodologies as well as
on the design style. In digital design researchers
interesting in decrease the consumed power, area as
result the speed of the system increases. By using
reversible logic which has advantages over traditional
one such as decrease gate counts and garbage output in
addition to constant inputs. In this paper design of
Viterbi decoder based reversible gates is presented and
verified using Xilinx.
Keywords :
Reversible Gates, Viterbi Decoder, Simulations and Results
The level of circuit performance which can
be reached with in certain design time mainly depends
on the efficiency of the design methodologies as well as
on the design style. In digital design researchers
interesting in decrease the consumed power, area as
result the speed of the system increases. By using
reversible logic which has advantages over traditional
one such as decrease gate counts and garbage output in
addition to constant inputs. In this paper design of
Viterbi decoder based reversible gates is presented and
verified using Xilinx.
Keywords :
Reversible Gates, Viterbi Decoder, Simulations and Results
